Course Overview

The Physical Design course is structured to provide a thorough understanding of the steps involved in converting a digital circuit design into a physical layout that can be fabricated on a silicon wafer. This course covers essential concepts, methodologies, and tools used in the physical design process, preparing students to handle real-world challenges in VLSI design.

Who Should Enroll?

• Recent graduates and entry-level engineers looking to specialise in physical design.
• Working professionals seeking to advance their skills in VLSI physical design.
• Individuals with a basic understanding of digital design and HDL (Verilog/VHDL).

Course Duration

• Duration: 12-16 weeks
• Mode: Online/Hybrid/In-person
• Prerequisites: Basic knowledge of digital electronics, HDL (Verilog/VHDL), and synthesis.

Course Modules

1. Introduction to Physical Design

• Overview of VLSI design flow
• Importance and objectives of physical design
• Key steps in the physical design process

2. Floor Planning

• Concepts of floorplanning
• Objectives: Area, performance, power
• Floor plan creation and optimization
• Handling macros and IP blocks
• Hands-on lab: Creating and optimising a floor plan

3. Partitioning and Placement

• Logic partitioning techniques
• Placement algorithms and strategies
• Objectives: Minimise wire length, congestion, and timing issues
• Standard cell placement
• Hands-on lab: Partitioning and placing standard cells

4. Clock Tree Synthesis (CTS)

• Importance of clock distribution
• Objectives: Minimise clock skew and latency
• Clock tree synthesis methodologies
• Handling multiple clock domains
• Hands-on lab: Performing CTS

5. Routing

• Routing techniques: Global and detailed routing
• Objectives: Minimise wire length, avoid congestion, and ensure signal integrity
• Handling signal, power, and clock routing
• Hands-on lab: Global and detailed routing

6. Physical Verification

• Design Rule Checking (DRC)
• Layout Versus Schematic (LVS)
• Electrical Rule Checking (ERC)
• Parasitic extraction
• Hands-on lab: Running DRC and LVS checks

7. Timing Closure

• Static Timing Analysis (STA) in physical design
• Analysing and fixing timing violations
• Crosstalk and noise analysis
• Hands-on lab: Timing closure and optimization

8. Design for Manufacturing (DFM)

• Importance of manufacturability
• Techniques to improve yield and reliability
• Handling lithography, CMP, and other manufacturing issues
• Hands-on lab: Implementing DFM techniques

9. Low Power Design Techniques

• Power reduction strategies
• Multi-Vt cells, clock gating, power gating
• Dynamic and leakage power analysis
• Hands-on lab: Applying low power techniques

10. Advanced Topics in Physical Design

• Handling advanced nodes and FinFET technology
• 3D ICs and advanced packaging techniques
• Physical design for high-performance computing and AI
• Emerging trends in physical design

11. Project and Assessment

• Final project involving complete physical design of a digital circuit
• Course assessment through quizzes, assignments, and project evaluation

Learning Outcomes

• Develop a deep understanding of the physical design process in VLSI.
• Gain practical skills in floorplanning, placement, CTS, routing, and physical verification.
• Learn to use industry-standard physical design tools (Cadence Innovus, Synopsys ICC, etc.).
• Master techniques for timing closure, low power design, and design for manufacturability.
• Understand advanced physical design challenges and emerging trends.
• Will get placed in any of our client companies

Enroll Today

Embark on a rewarding career in VLSI physical design with our comprehensive course. Gain the expertise and hands-on experience needed to excel in the semiconductor industry.

🔗 Learn more and enroll: www.eChipMinds.com
📧 Contact us: info@eChipMinds.com
📞 Call us: +91 8660157834

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